Samsung has the technology 3nm FinFET process capability to rival TSMC

A large number of orders made in processes below 7nm. Nearly all suppliers capable of developing 3nm chip designs and able to withstand rising foundry costs have placed orders with TSMC, the sources said. The pure-play foundry has seen scenarios where customers queue up for its available 3nm FinFET process capabilities with upfront payments.

Porotech receives US$20 million in financing, focusing on MicroLED microdisplay technology and new nanoporous gallium nitride material technology

Porotech, a developer of porous gallium nitride (GaN) semiconductor materials and a provider of MicroLED technology, announced the completion of its Series A financing, led by Amoeba Capital, followed by Samsung Ventures, Honghui Fund, and individual investors.

Due to the shortage of foundry capacity, many mainstream manufacturers of network communication chips cannot wait for the mature process to expand production. Therefore, they changed the product design plan, upgraded the 6nm process using TSMC in advance, and invested heavily in production capacity, and even some network communication chips. The factory has signed a long-term contract of more than three years with the foundry at the end of last year.

Digital transformation directions such as 5G and high-performance computing (HPC) are one of the main driving forces for TSMC's future performance improvement. Today, it is clear that network communication chip customers will upgrade their process technology from 28nm to 16nm, and further upgrade to 6nm.

Samsung has the technology to rival TSMC, but because Samsung competes with Apple in the smartphone business.

During the function operation process from off to on, the current in the sleep state is <100uA, and the current in the wake-up state is >10mA. In the dynamic moment, the motor startup current is generally greater than 800mA, and the emission current of the RF module is generally greater than 30mA.

High-efficiency DC-DC can ensure dynamic and static power efficiency, but in fact, you will find that at the level of low-power uA-level current, it is difficult for the current DC-DC chips on the market to take into account light and heavy load efficiency at the same time. .

An ordinary Buck DC-DC chip can easily achieve an efficiency of more than 85% under the condition of current consumption of 100mA, but under the condition of 50uA, its conversion efficiency is usually much lower than 50%.